Meta just confirmed what the AI industry has been whispering about for a year: Google’s TPUs are running Meta’s production AI workloads right now. The announcement landed October 22, 2026 on Google’s developer blog — Meta’s PyTorch-TPU lead Zongwei Zhou said the new SGLang-TorchTPU engine is “running in production at Meta today” after “a close three-way collaboration between Meta, Google, and the SGLang team.”
Meta running on Google silicon is more than a customer win. It is the clearest crack yet in NVIDIA’s software moat — and it comes with numbers: a tuned setup serving the 2.8-trillion-parameter Kimi K3 topped 700 tokens per second on 16 Google Ironwood TPUs, against 452 tokens per second on 16 NVIDIA GB200s.
What Google and Meta actually announced
Two announcements, two days apart, one story:
- October 20, PyTorch Conference 2026: Google open-sourced TorchTPU, its native PyTorch stack for TPUs, on GitHub under Apache 2.0 — co-developed with the PyTorch team at Meta. “With TorchTPU, TPUs join GPUs and CPUs as a native option for PyTorch,” Google said.
- October 22: Google announced SGLang-TorchTPU and vLLM-TorchTPU — native PyTorch backends for the two most-used open-source serving engines — plus Meta’s confirmation that SGLang-TorchTPU is in production at Meta.
Meta’s director of PyTorch engineering, Jana van Greunen, put the strategy bluntly: “We cannot be constrained by a single hardware architecture,” and TorchTPU “enables us to deploy our PyTorch workloads to Google TPUs” — including major LLM, ads, and recommendation workloads.
The performance evidence
These are vendor-adjacent numbers — the benchmarks come from Inferact and RadixArk, startups that helped build the engines — but they are specific and checkable:
| Workload | 16× Google Ironwood TPU | 16× NVIDIA GB200 |
|---|---|---|
| Kimi K3 (2.8T params), single user, speculative decoding | 700+ tokens/sec | 452 tokens/sec |
| Kimi K3 / Qwen 3.8 27B kernels, small batch, no speculative decoding | 1.4–2× GB200 throughput | baseline |
| Qwen 3 8B training | 52% Model FLOPs Utilization, 8,192 Ironwood chips, near-linear scaling | not disclosed |
The three-way build: Meta + Google + the engine teams
This wasn’t a Google solo project. The stack spans four GitHub repos and three organizations:
- Google built TorchTPU (~450 ATen operations, Pallas kernels, built-in distributed primitives) with Meta’s PyTorch team — Mark Lohmeyer (VP/GM, AI and computing infrastructure) and Bill Jia (VP, engineering) led the announcement.
- Meta co-developed it and is the production proof point — LLM, ads, and recommendation workloads on Google silicon.
- RadixArk (founded by SGLang’s creators) built SGLang-TorchTPU; its CTO Banghua Zhu said TorchTPU “supercharged our development velocity” and passes “massive efficiency gains” to customers.
- Inferact (founded by vLLM’s creators) built vLLM-TorchTPU; CEO Simon Mo said developers can “immediately run production workloads on TPUs with the high throughput, low latency, and memory efficiency they expect.”
Hugging Face is in too: in Transformers v5, sending a model to a TPU is just device_map="tpu", and Google runs the Transformers test suite on TPUs nightly.
PyTorch/XLA vs. TorchTPU: why this attempt is different
Google has tried PyTorch-on-TPU before — and Meta walked away. SemiAnalysis reported Meta research teams used TPUs via the old PyTorch/XLA bridge from 2020 to 2023, then canceled those contracts. Google now calls that bridge a “predecessor.” The difference:
| PyTorch/XLA (old) | TorchTPU (new) | |
|---|---|---|
| Execution | Lazy tensor graphs, mystery recompiles | Full eager mode + torch.compile |
| Code changes | Mark compilable regions, long compile times | .to("cuda") → .to("tpu") |
| Serving engines | JAX-based only | Native vLLM + SGLang |
| Status | Superseded | Production at Meta |
How your PyTorch code lands on a TPU now
1. Swap one call
Change .to("cuda") to .to("tpu"). Tensors are ordinary PyTorch tensors — no wrappers.
2. Debug in eager
Standard PyTorch workflow: eager execution first, exactly like on a GPU.
3. Compile for production
Hand the model to torch.compile for throughput and lower memory overhead.
4. Serve with vLLM / SGLang
Native backends give you continuous batching, quantization, and multi-chip parallelism on TPUs.
What it means for NVIDIA’s moat
Don’t write the obituary — the skepticism is warranted. The 1.4–2× throughput figures come from startups with a stake in the outcome, and they may not mirror real-world production. NVIDIA’s scale and software depth remain formidable.
But the direction of travel is now undeniable, and it’s a two-front squeeze:
- Google’s TorchTPU (Oct 20) — with Meta as production proof.
- Amazon’s TorchNeuron (Oct 21) — the same kind of native PyTorch bridge for Trainium2 and Trainium3, open-sourced at the same PyTorch Conference.
Both attack the same lock-in: CUDA’s grip on the PyTorch code that reportedly powers the vast majority of AI applications. Meanwhile Meta — which just raised its 2026 AI capex to as much as $145B — is reportedly on a multi-year Google Cloud TPU rental agreement (rentals in 2026, purchases in 2027), giving Google’s seventh-generation Ironwood chips their biggest endorsement yet. RadixArk is targeting Day 0 TPU support for new open models by Q1 2027, starting with DeepSeek V4.1 Flash and Reflection Beam, with more detail due at SGLang Summit 2026 in San Francisco, November 12–13.
How to profit: cheaper inference is a margin machine
Every AI tool business has the same biggest cost: inference. Hardware competition compresses it. Concrete moves:
- Benchmark your workload on TPUs now. TorchTPU is Apache 2.0 on GitHub; if your stack is vLLM or SGLang, the backends exist today. Measure tokens-per-dollar against your GPU bill.
- Use llm-d 1.0 for fleet routing. Google shipped llm-d 1.0 with Red Hat, IBM, and 500+ contributors — on GKE it routes across GPUs and TPUs through one endpoint, so you can arbitrage hardware per workload.
- Try
device_map="tpu"on Hugging Face. Transformers v5 makes TPU deployment a one-argument change — prototype without rewriting. - Calendar the SGLang Summit (Nov 12–13). Day 0 TPU support roadmaps and pricing signals will land there — position your infra bets after, not before.
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FAQ
Is Meta really running AI on Google TPUs?
Yes — Meta’s PyTorch-TPU lead Zongwei Zhou said SGLang-TorchTPU is “running in production at Meta today,” announced via Google’s developer blog on October 22, 2026.
What is TorchTPU?
Google’s native PyTorch backend for its TPUs, open-sourced October 20, 2026 at PyTorch Conference 2026 under Apache 2.0. It was co-developed with Meta’s PyTorch team and replaces the older PyTorch/XLA bridge.
How much code do I change to run PyTorch on a TPU?
In most cases, one call: .to("cuda") becomes .to("tpu"). You debug in eager mode, then use torch.compile for production performance.
How fast are TPUs vs NVIDIA GPUs?
Per Inferact’s tests: a tuned vLLM setup on 16 Ironwood TPUs topped 700 tokens/sec serving Kimi K3 (2.8T params) for one user, vs 452 tokens/sec on 16 NVIDIA GB200s. Specialized kernels hit 1.4–2× GB200 throughput at small batch sizes.
Which models will SGLang-TorchTPU support?
DeepSeek V4.1 Flash and Reflection Beam are next, with RadixArk targeting Day 0 TPU support for new open models by Q1 2027.
What did Amazon announce?
At the same PyTorch Conference, Amazon open-sourced TorchNeuron — its native PyTorch backend for Trainium2 and Trainium3 chips. Google and Amazon are both attacking NVIDIA’s CUDA lock-in.
Where can I learn more?
Google, Meta, and RadixArk will share details at SGLang Summit 2026 in San Francisco on November 12–13.
Sources
- Zot: Meta deploys Google TPUs for AI inference (production confirmation, quotes, benchmarks)
- SiliconANGLE: Google unveils TorchTPU to break Nvidia’s stranglehold
- WebProNews: Google open-sources TorchTPU and ships llm-d 1.0
- Help Net Security: TorchTPU — PyTorch on TPUs, Hugging Face integration
- Pondero: Google open-sources TorchTPU a day after AWS shipped TorchNeuron
- PyTorch (official): Introducing TorchTPU — native PyTorch acceleration on Google TPUs